Espressif Systems /ESP32-P4 /LP_UART /INT_RAW

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Interpret as INT_RAW

Description

Raw interrupt status

Fields

RXFIFO_FULL_INT_RAW	This interrupt raw bit turns to high level when receiver receives more data than what rxfifo_full_thrhd specifies.
TXFIFO_EMPTY_INT_RAW	This interrupt raw bit turns to high level when the amount of data in Tx-FIFO is less than what txfifo_empty_thrhd specifies .
PARITY_ERR_INT_RAW	This interrupt raw bit turns to high level when receiver detects a parity error in the data.
FRM_ERR_INT_RAW	This interrupt raw bit turns to high level when receiver detects a data frame error .
RXFIFO_OVF_INT_RAW	This interrupt raw bit turns to high level when receiver receives more data than the FIFO can store.
DSR_CHG_INT_RAW	This interrupt raw bit turns to high level when receiver detects the edge change of DSRn signal.
CTS_CHG_INT_RAW	This interrupt raw bit turns to high level when receiver detects the edge change of CTSn signal.
BRK_DET_INT_RAW	This interrupt raw bit turns to high level when receiver detects a 0 after the stop bit.
RXFIFO_TOUT_INT_RAW	This interrupt raw bit turns to high level when receiver takes more time than rx_tout_thrhd to receive a byte.
SW_XON_INT_RAW	This interrupt raw bit turns to high level when receiver recevies Xon char when uart_sw_flow_con_en is set to 1.
SW_XOFF_INT_RAW	This interrupt raw bit turns to high level when receiver receives Xoff char when uart_sw_flow_con_en is set to 1.
GLITCH_DET_INT_RAW	This interrupt raw bit turns to high level when receiver detects a glitch in the middle of a start bit.
TX_BRK_DONE_INT_RAW	This interrupt raw bit turns to high level when transmitter completes sending NULL characters after all data in Tx-FIFO are sent.
TX_BRK_IDLE_DONE_INT_RAW	This interrupt raw bit turns to high level when transmitter has kept the shortest duration after sending the last data.
TX_DONE_INT_RAW	This interrupt raw bit turns to high level when transmitter has send out all data in FIFO.
AT_CMD_CHAR_DET_INT_RAW	This interrupt raw bit turns to high level when receiver detects the configured at_cmd char.
WAKEUP_INT_RAW	This interrupt raw bit turns to high level when input rxd edge changes more times than what reg_active_threshold specifies in light sleeping mode.

Links

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